To provide more dense memory for computing operations, concepts involving memory devices (which may be referred to as 3D stacked memory, or stacked memory) having a plurality of closely coupled memory elements have been developed.
A 3D stacked memory may include coupled layers or packages of DRAM (dynamic random-access memory) memory elements, which may be referred to as a memory stack. Stacked memory may be utilized to provide a great amount of computer memory in a single device or package, where the device or package may also include certain system components, such as a memory controller and CPU (central processing unit).
As memory devices increase in size and complexity, there is an increase need for effective and efficient testing of such devices, where testing includes accessing each physical address of the memory.
However, the memory dies within a stacked memory device may vary in design, and in particular such memory may vary in the logical to physical addressing of the memory, thereby complicating the task of providing a complete test of the memory device.